The present invention relates to a semiconductor device having capacitors using a ferroelectric film such as ferroelectric nonvolatile memory or a dynamic rondam access memory (DRAM).
Some ferroelectric materials have extremely large relative dielectric constants ranging from several hundreds to several thousands. Therefore, use of a thin film made of these ferroelectric materials for a capacitor dielectrics provides a capacitor of small area and large capacity suitable for large scale integration (LSI) devices. Also, the ferroelectric material has spontaneous polarization that can be inverted in direction by an applied electric field, thereby providing a nonvolatile memory.
As described in Japanese unexamined Patent Application No. 5-90606 and referring to FIG. 14, the conventional ferroelectric memory is fabricated by forming on an interlayer insulating film 144 with a bottom Pt electrode 145, ferroelectric film 146, and a top Pt electrode 147 in this order, thereby forming a ferroelectric capacitor. However, in the conventional ferroelectric memory, each of the layers is formed with an independent mask, which makes the memory cell area large because of critical dimension uniformity and alignment tolerance, thereby making it difficult to fabricate highly integrated memory devices. The conventional technique also involves a problem of thinning the interlayer insulating film 144 for the conventional technique repeats the patterning on it for forming the ferroelectric capacitors.
To solve the above-mentioned problems, a method was proposed as described in Japanese unexamined Patent Application No. 2-288368, in which a top electrode 158, a ferroelectric film 157, and a bottom electrode 156 are collectively dry-etched with the photoresist used as a mask as shown in FIG. 15. This method uses polysilicon for the top and bottom electrodes 158 and 156, which are dry-etched with C.sub.2 Cl.sub.2 F.sub.4, SF.sub.6, and Ar gases.
However, forming a ferroelectric film directly on polysilicon, a silicon oxide film of a low dielectric constant is formed at the interface. The silicon oxide film thus formed significantly deteriorates capacitor characteristics. To avoid this deterioration, it is necessary to use electrodes made of noble metals such as platinum and palladium or conductive oxides such as IrO.sub.2, RuO.sub.2, and ReO.sub.3.
Of the above-mentioned electrode materials, platinum is considered best suited for the application. Therefore, in the memory cell forming process described in Japanese unexamined Patent Application No. 5-299601 collectively dry-etches a top electrode 45, a ferroelectric film 44, a bottom electrode 43, and a conductive diffusion barrier layer 169 with the photoresist used as the mask as shown in FIG. 16. Use of such a structure can implement microscopic capacitors without losing their properties.
Actually, however, platinum cannot be converted to a highly volatile reaction product to be dry-etched. It was observed that, if platinum is dry-etched, a redeposited material forms a wall-shaped residue (hereinafter referred to as a platinum-contained deposit) on the capacitor side wall due to the low volatility. In this structure, the above-mentioned platinum-contained deposits short-circuit the top electrode 45 and the bottom electrode 43.
It is therefore an object of the present invention to provide a capacitor in which the top and bottom electrodes thereof will not be short-circuited when the top electrode, the ferroelectric film, and the bottom electrode are etched with single photolithography process step.